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| Data Sheet, Rev. 1.0, June 2009 TLE8110EE Smart Multichannel Low Side Switch with Parallel Control and SPI Interface coreFLEX Automotive Power FLEX Smart Multi-Channel Switch 1 2 2.1 3 3.1 3.2 3.3 4 4.1 4.2 4.3 5 5.1 5.2 6 6.1 6.2 7 7.1 7.2 7.3 7.4 8 8.1 8.2 9 9.1 9.2 10 10.1 11 11.1 11.2 11.3 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 11 12 13 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Description Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Electrical Characteristics Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Reset and Enable Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Description Reset and Enable Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Electrical Characteristics Reset Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Power Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Description Power Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Description of the Clamping Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Power Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parallel Connection of the Power Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 20 21 22 27 Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Description Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Electrical Characteristics Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Parallel Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Description Parallel Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Electrical Characteristics Parallel Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Electrical Characteristics Overload Protection Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 16 bit SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Description 16 bit SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics 16 bit SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 41 41 42 44 44 44 44 45 45 45 47 48 49 49 49 50 12 Control of the device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.1 Internal Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2 SPI Interface. Signals and Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.1 Description 16 bit SPI Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.2 Daisy Chain Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.3 SPI Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.3.1 16-bit protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.3.2 2x8-bit protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.3.3 16- and 2x8-bit protocol mixed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.4 safeCOMMUNICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.4.1 Encoding of the commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.4.2 Modulo-8 Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.2.4.3 TOR - Transmission or Diagnosis Error Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Sheet 2 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch 12.3 Register and Command - Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.1 CMD - Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.1.1 CMD_RSD - Command: Return Short Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.1.2 CMD_RSDS - Command: Return Short Diagnosis and Device Status . . . . . . . . . . . . . . . . . . . . 12.3.1.3 CMD_RPC - Command: Return Pattern Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.1.4 CMD_RINx - Command: Return Input Pin (INx) -Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.2 DCC - Diagnosis Registers and compactCONTROL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.2.1 DRx - Diagnosis Registers Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.2.2 DRx - Return on DRx Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.2.3 DMSx/OPSx - Diagnosis Mode Set / Output Pin Set Commands . . . . . . . . . . . . . . . . . . . . . . . . 12.3.3 OUTx - Output Control Register CHx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.4 ISx - INPUT or Serial Mode Control Register, Bank A and Bank B . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.5 PMx - Parallel Mode Register CHx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.3.6 DEVS - Device Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 14 50 53 54 55 58 58 60 63 63 64 66 66 67 67 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Revision History (Book) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Data Sheet 3 Rev. 1.0, 2009-06-15 Smart Multichannel Low Side Switch with Parallel Control and SPI Interface coreFLEX TLE8110EE 1 Features * * * * * * * * Overview Overvoltage, Overtemperature, ESD -Protection Direct Parallel PWM Control of all Channels safeCOMMUNICATION (SPI and Parallel) Efficient Communication Mode: compactCONTROL Compatible with 3.3V- and 5V- Micro Controllers I/O ports clampSAFE for highly efficient parallel use of the channels Green Product (RoHS compliant) AEC Qualified PG-DSO-36-41 Application * Power Switch Automotive and Industrial Systems switching Solenoids, Relays and Resistive Loads Description 10 - channel Low-Side Switch in Smart Power Technology [SPT] with Serial Peripheral Interface [SPI] and 10 open drain DMOS output stages. The TLE8110EE is protected by embedded protection functions and designed for automotive and industrial applications. The output stages are controlled via Parallel Input Pins for PWM use or SPI Interface . The TLE8110EE is particularly suitable for Engine Management and Powertrain Systems. Type TLE8110EE Data Sheet Package PG-DSO-36-41 4 Marking TLE8110EE Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Overview Table 1 Parameter Product Summary Symbol Value 4.50 ... 5.50 3.00 ... 5.50 55 0.30 0.25 0.60 0.60 0.50 1.20 1.50 1.70 0.75 2.60 3.70 1.70 Unit V V V A A A A A A Analogue Supply voltage Digital Supply Voltage clamping voltage (CH 1-10) On resistance typical at Tj=25C and IDnom On resistance maximum at Tj=150C and IDnom Nominal Output current (CH 1-4) Nominal Output current (CH 5-6) Nominal Output current (CH 7-10) Output Current Shut-down Threshold (CH 1-4) min. Output Current Shut-down Threshold (CH 5-6) min. Output Current Shut-down Threshold (CH 7-10) min. VDD VCC VDS(AZ)typ RON1-4 RON5-6 RON7-10 RON1-4 RON5-6 RON7-10 IDnom IDnom IDnom IDSD(low) IDSD(low) IDSD(low) VBatt Supply IC VDD = typ. 5V VCC = typ. 3.3....5V RST Micro I/O Controller I/O EN TLE8110 EE IN1 OUT1 4 to 6 Injectors or Solenoids General purpose Channels in parallel connection General purpose Channels for Relays I/O SPI_SI SPI_SO SPI_CLK SPI_CS IN10 SPI_SO SPI_SI SPI_CLK SPI_CS OUT10 Appl _Diag_10ch_TLE8110 .vsd Figure 1 Block Diagram TLE8110EE Data Sheet 5 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Block Diagram 2 Block Diagram RST VDD EN IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 IN9 IN10 S_CS S_CLK S_SI S_ SO VCC Input Control (TTL or CMOS) analogue control, diagnostic and protective functions OUT1 temperature sensor short circuit detection gate control OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 input register SPI (TTL or CMOS) diagnosis register control register Logic control unit open load detection short to GND detection GND Block_diag_10ch_TLE8110.vsd Figure 2 Block Diagram 2.1 Description Communication The TLE8110EE is a 10-channel low-side switch in PG-DSO-36-41 package providing embedded protective functions. The 16 bit serial peripheral interface (SPI) can be utilized for control and diagnosis of the device and the loads. The SPI interface provides daisy-chain capability in order to assemble multiple devices in one SPI chain by using the same number of micro-controller pins. The analogue and the digital part of the device is supplied by 5V. Logic Input and Output Signals are then compatible to 5V logic level [TTL - level]. Optionally, the logic part can be supplied with lower voltages to achieve signal compatibility with e.g. 3.3V logic level [CMOS - level]. The TLE8110EE is equipped with 10 parallel input pins that are routed to each output channel. This allows control of the channels for loads driven by Pulse Width Modulation (PWM). The output channels can also be controlled by SPI. Reset The device is equipped with one Reset Pin and one Enable. Reset [RST] serves the whole device, Enable [EN] serves only the Output Control Unit and the Power Stages. Diagnosis The device provides diagnosis of the load, including open load, short to GND as well as short circuit to VBatt detection and over-load / over-temperature indication. The SPI diagnosis flags indicates if latched fault conditions may have occurred. Data Sheet 6 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Block Diagram Protection Each output stage is protected against short circuit. In case of over load, the affected channel is switched off. The switching off reaction time is dependent on two switching thresholds. Restart of the channel is done by clearing the Diagnosis Register. This feature protects the device against uncontrolled repetitive short circuits. The reaction to a short-circuit and over-temperature can alternatively changed to further modes, such as semi- or auto - restart of the affected channel. There is a temperature sensor available for each channel to protect the device in case of over temperature. In case of over temperature the affected channel is switched off and the Over-Temperature Flag is set. Restart of the channel is done by deleting the Flag. This feature protects the device against uncontrolled temperature toggling. Parallel Connection of Channels The device is featured with a central clamping structure, so-called CLAMPsafe. This feature ensures a balanced clamping between the channels and allows in case of parallel connection of channels a high efficient usage of the channel capabilities. This parallel mode is additionally featured by best possible parameter- and thermal matching of the channels and by controlling the channels accordingly. Data Sheet 7 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Pin Configuration 3 3.1 Pin Configuration Pin Assignment 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Figure 3 Pin Configuration 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 3.2 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Pin Definitions and Functions Symbol GND P_IN1 P_IN2 EN RST P_IN3 P_IN4 VDD P_IN5 VCC S_SO S_CLK S_CS S_SI P_IN6 P_IN7 P_IN8 GND Function Ground Parallel Input Pin 1. Default assignment to Output Channel 1. Parallel Input Pin 2. Default assignment to Output Channel 2. Enable Input Pin. If not needed, connect with Pull-up resistor to VCC. Reset Input Pin. (low active). If not needed, connect with Pull-up resistor to VCC. Parallel Input Pin 3. Default assignment to Output Channel 3. Parallel Input Pin 4. Default assignment to Output Channel 4. Analogue Supply Voltage Parallel Input Pin 5. Default assignment to Output Channel 5. Digital Supply Voltage Serial Peripheral Interface [SPI], Serial Output Serial Peripheral Interface [SPI], Clock Input Serial Peripheral Interface [SPI], Chip Select (active Low) Serial Peripheral Interface [SPI], Serial Input Parallel Input Pin 6. Default assignment to Output Channel 6. Parallel Input Pin 7. Default assignment to Output Channel 7. Parallel Input Pin 8. Default assignment to Output Channel 8. Ground 8 Rev. 1.0, 2009-06-15 Data Sheet FLEX Smart Multi-Channel Switch Pin Configuration Pin 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Symbol GND OUT9 OUT10 N.C. GND OUT6 OUT4 OUT3 P_IN9 P_IN10 OUT2 OUT1 OUT5 GND N.C. OUT8 OUT7 GND Function Ground Drain of Power Transistor Channel 9 Drain of Power Transistor Channel 10 internally not connected, connect to Ground Ground Drain of Power Transistor Channel 6 Drain of Power Transistor Channel 4 Drain of Power Transistor Channel 3 Parallel Input Pin 9. Default assignment to Output Channel 9. Parallel Input Pin 10. Default assignment to Output Channel 10. Drain of Power Transistor Channel 2 Drain of Power Transistor Channel 1 Drain of Power Transistor Channel 5 Ground internally not connected, connect to Ground Drain of Power Transistor Channel 8 Drain of Power Transistor Channel 7 Ground Cooling Tab; internally connected to GND Cooling GND Tab Data Sheet 9 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Pin Configuration 3.3 Terms VB att PG-DSO-36 VP _IN1 V P _IN2 VE N VRS T VP _IN3 V P _IN4 V V DD V P _IN5 V V CC VS _S O VS _CLK V S _CS V S _S I VP _IN6 VP _IN7 IP _IN1 I P _IN2 IE N I RS T I P _IN3 I P _IN4 IV DD IP _IN5 IV CC IS _S O IS _CLK IS _CS IS _S I IP _IN6 IP _IN7 IP _IN8 VP _IN8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 GND P_IN1 P_IN2 EN RST P_IN3 P_IN4 VDD P_IN5 VCC S_SO S_CLK S_CS S_SI P_IN6 P_IN7 P_IN8 GND Heat-Slug / Exposed Pad (back-side) GND OUT7 OUT8 N.C. GND OUT5 OUT1 GND OUT2 P_IN10 P_IN9 OUT3 OUT4 OUT6 GND N.C. OUT10 OUT9 GND 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 IOUT7 IOUT8 V OUT7 VOUT8 IOUT5 IOUT1 IOUT2 IP _IN10 IP _IN9 IOUT3 IOUT4 IOUT6 VOUT5 VOUT1 VOUT2 V P _IN10 VP _IN9 VOUT3 VOUT4 V OUT6 I OUT10 IOUT9 V OUT9 VOUT10 Top View Terms_TLE8110.vsd Figure 4 Terms Data Sheet 10 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch General Product Characteristics 4 4.1 General Product Characteristics Absolute Maximum Ratings1) Absolute Maximum Ratings Tj = -40 C to +150 C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Supply Voltages 4.1.1 4.1.2 4.1.3 4.1.4 4.1.5 4.1.6 4.1.7 4.1.8 4.1.9 Digital Supply voltage Digital Supply voltage Analogue Supply voltage Analogue Supply voltage Load Current (CH 1 to 10 ) Reverse Current Output (CH 1-10) Total Ground Current Continous Drain Source Voltage (Channel 1 to 10) maximum Voltage for short circuit protection on Output Maximum Energy Dissipation per Channel. Single Pulse. Channel 1-4. Maximum Energy Dissipation per Channel. Single Pulse. Channel 1-4. Maximum Energy Dissipation per Channel. Single Pulse. Channel 5-6. Maximum Energy Dissipation per Channel. Single Pulse. Channel 5-6. Maximum Energy Dissipation per Channel. Single Pulse. Channel 7-10. Maximum Energy Dissipation per Channel. Single Pulse. Channel 7-10. Input Voltage at all Logic Pin Max. 5.5 6.2 5.5 6.2 IDSD(low) 20 45 24 V V V V A A A V V permanent t < 10s permanent t < 10s - - - - one event on one single channel. ID = 3.8A Tj = 150C ID = 1.5A Tj = 150C ID = 4.8A Tj = 150C ID = 1,7A Tj = 150C ID = 2.3A Tj = 150C ID = 0.75A Tj = 150C Unit Conditions VCC VCC VDD VDD IDn IDn IGND -0.3 -0.3 -0.3 -0.3 -IDSD(low) -20 -0.3 - Power Stages VDSn VDSn Single Clamping Energies1) 2) 4.1.10 EAS - 28 mJ 4.1.11 EAS - 43 mJ 4.1.12 EAS - 37 mJ 4.1.13 EAS - 54 mJ 4.1.14 EAS - 10 mJ 4.1.15 EAS - 32 mJ Logic Pins (SPI, INn, EN, RST) 4.1.16 Vx -0.3 5.5 V permanent 1) Not subject to production test, specified by design. Data Sheet 11 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch General Product Characteristics Absolute Maximum Ratings (cont'd) Tj = -40 C to +150 C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. 4.1.17 4.1.18 4.1.19 4.1.20 Parameter Input Voltage at all Logic Pin Input Voltage at Pin 27, 28 (IN9, 10, ) Junction Temperature Junction Temperature Symbol Limit Values Min. Max. 6.2 45 150 175 V V C C t < 10s permanent - max. 100hrs cumulative - All Pins HBM3) 1.5KOhm, 100pF All Pins CDM4) Pin 1, 18, 19, 36 (corner pins) CDM4) -0.3 -0.3 -40 -40 Unit Conditions Vx Vx Tj Tj Temperatures 4.1.21 4.1.22 Storage Temperature Electro Static Discharge Voltage "Human Body Model - HBM" Electro Static Discharge Voltage "Charged Device Model - CDM" Electro Static Discharge Voltage "Charged Device Model - CDM" Tstg VESD -55 -4 150 4 C kV ESD Robustness 4.1.23 4.1.24 VESD VESD -500 -750 500 750 V V 1) 2) 3) 4) Only one single channel at one time. triangular test pulse ESD susceptibility, HBM according to EIA/JESD 22-A114-B ESD susceptibility, Charged Device Model "CDM" EIA/JESD22-C101-C Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. 4.2 Pos. Functional Range Parameter Symbol Min. Limit Values Max. 5.5 V V V - - leakage Currents (ICC) might increase if VCC > VDD. resistive loads1) Rev. 1.0, 2009-06-15 Unit Conditions Supply Voltages 4.2.1 4.2.2 4.2.3 Analogue Supply Voltage Digital Supply Voltage Digital Supply Voltage VDD VCC VCC 4.5 3 VDD 5.5 VDD Power Stages 4.2.4 Ground Current IGND_typ 12 9 A Data Sheet FLEX Smart Multi-Channel Switch General Product Characteristics Pos. Parameter Symbol Min. Temperatures 4.2.5 4.2.6 Junction Temperature Junction Temperature Limit Values Max. 150 175 C C 1) Unit Conditions Tj Tj -40 -40 for 100hrs 1) Not subject to production test, specified by design. Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. 4.3 Pos. 4.3.1 4.3.2 Thermal Resistance Parameter Junction to Soldering Point Junction to Ambient Symbol Min. Limit Values Typ. 1.75 25.00 Max. 3.60 K/W K/W Pvtot = 3W1)2)3) Pvtot = 3W1)2)3) Unit Conditions RthJSP RthJA 1) Not subject to production test, specified by design. 2) Homogenous power distrubution over all channels (All Power stages equally heated), dependent on cooling set-up 3) refer to Figure 5 Data Sheet 13 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch General Product Characteristics Dimensions: 76.2 x 114.3 x 1.5 mm , FR4 Metalization : JEDEC 2s2p (JESD 51-7) + (JESD 51-5) Thermal Vias: Diameter 0.3 mm; plating 25 m; 24 pcs. for PG-DSO-36-41 70m modeled (traces) 1,5 mm 35m, 90% metalization 35m, 90% metalization 70m, 5% metalization P_DSO_36_41_PCB.vsd Figure 5 PG-DSO-36-41 PCB set-up Data Sheet 14 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Supply 5 5.1 Power Supply Description Power Supply The TLE8110EE is supplied by analogue power supply line VDD which is used for the analogue functions of the device, such as the gate control of the power stages. The digital power supply line VCC is used to supply the digital part and offers the possibility to adapt the logic level of the serial output pins to lower logic levels. RST VCC VDD EN VCC Under Voltage Monitor or VDD Under Voltage Monitor or input register Input and Serial Interface diagnosis register control register Logic control unit analogue control, diagnostic and protective functions Fault Detection Gate Control OUTx GND Block_diag_Supply_Reset.vsd Figure 6 Block Diagram Supply and Reset Description Supply The Supply Voltage Pins are monitored during the power-on phase and under normal operating conditions for under voltage. If during Power-on the increasing supply voltage exceeds the Supply Power-on Switching Threshold, the internal Reset is released after an internal delay has expired. In case of under voltage, a device internal reset is performed. The Switching Threshold for this case is the Poweron Switching threshold minus the Switching Hysteresis. In case of under voltage on the analogue supply line VDD the outputs are turned off but the content of the registers and the functionality of the logic part is kept alive. In case of under voltage on the digital supply VCC line, a complete reset including the registers is performed. After returning back to normal supply voltage and an internal delay, the related functional blocks are turned on again. For more details, refer to the chapter "Reset" The device internal under-voltage set will set the TOR bit and the related bits in SDS (Short Diagnosis and Device Status) to allow the micro controller to detect this reset. For more information, refer to the chapter "Control of the Device". Figure 7 removed Data Sheet 15 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Supply 5.2 Electrical Characteristics Power Supply Electrical Characteristics: Power Supply 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Min. Digital Supply and Power-on Reset 5.2.1 5.2.2 a) Digital Supply Voltage (VCC < VCCpo ) Limit Values Typ. 15 Max. 5.5 20 V A fSCLK = 0Hz, S_CS = VCC, Tj=85C 1) VCC = 2.0V VDD > VCC fSCLK = 0Hz, S_CS = VCC, Tj=150C VCC = 2.0V VDD > VCC fSCLK = 0Hz, S_CS = VCC, Tj=85C1) VDD > VCC fSCLK = 0Hz, S_CS = VCC, Tj=150C VDD > VCC fSCLK = 0Hz, Tj=150C. all Channels ON 1) Unit Conditions VCC Digital Supply Current during Reset ICCstb 3 - b) - 20 40 A 5.2.3 a) Digital Supply Current during Reset ICCstb ( VRST < VRSTl) - 2 5 A b) - 5 15 A 5.2.4 a) Digital Supply Operating Current VCC = 3.3V ICC - 0.15 2 mA b) - 0.5 5 mA fSCLK = 5MHz, Tj=150C. all Channels ON 1)2) 5.2.5 a) b) Digital Supply Operating Current VCC = 5.5V ICC - 0.25 2 mA fSCLK = 0Hz, Tj=150C. all Channels ON fSCLK = 5MHz, Tj=150C. all Channels ON 1)2) - 0.8 10 mA 5.2.6 5.2.7 5.2.8 Digital Supply Power-on Switching Threshold removed VCCpo 1.9 100 2.8 300 3 500 V mV VCC increasing 1) Digital Supply Switching Hysteresis VCChy Data Sheet 16 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Supply Electrical Characteristics: Power Supply 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. 5.2.9 5.2.10 5.2.11 a) b) 5.2.12 a) b) 5.2.13 Analogue Supply Current during Reset ( VEN< VENl) Parameter removed Analogue Supply Voltage Analogue Supply Current during Reset (VDD< VDDpo ) Symbol Min. Analogue Supply and Power-on Reset Limit Values Typ. Max. Unit Conditions VDD IDDstb 4.5 - 10 5.5 20 V A fSCLK = 0Hz, Tj=85C 1) VDD = 2V fSCLK = 0Hz, Tj=150C VDD = 2V fSCLK = 0Hz, Tj=85C 1) fSCLK = 0Hz, Tj=150C fSCLK = 0...5MHz1) Tj=150C all Channels ON - 15 40 A IDDstb - 1 2 8 5 15 25 A A mA Analogue Supply Operating Current IDD 5.2.14 5.2.15 5.2.16 5.2.17 Analogue Supply Power-on Switching Threshold Analogue Supply Switching Hysteresis Analogue Supply Power-on Delay Time removed VDDpo VDDhy tVDDpo 3 100 - 4.2 200 100 4.5 400 200 V mV s VDD increasing 1) VDD increasing 1) 1) Parameter not subject to production test. Specified by design. 2) C = 50pF connected to S_SO Data Sheet 17 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Reset and Enable Inputs 6 6.1 Reset and Enable Inputs Description Reset and Enable Inputs The TLE8110EE contains one Reset- and one Enable Input Pin as can be seen in Figure 6. Description: Reset Pin [RST] is the main reset and acts as the internal under voltage reset monitoring of the digital supply voltage VCC: As soon as RST is pulled low, the whole device including the control registers is reset. The Enable Pin [EN] resets only the Output channels and the control circuits. The content of the all registers is kept. This functions offers the possibility of a "soft" reset turning off only the Output lines but keeping alive the SPI communication and the contents of the control registers. This allows the read out of the diagnosis and setting up the device during or directly after Reset. 6.2 Electrical Characteristics Reset Inputs Electrical Characteristics: Reset Inputs 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Min. Reset Input Pin [RST] 6.2.1 6.2.2 6.2.3 6.2.4 6.2.5 6.2.6 6.2.7 6.2.8 6.2.9 6.2.10 6.2.11 6.2.12 Low Level of RST High Level of RST RST Switching Hysteresis Reset Pin pull-down Current removed Minimum Reset Duration time RST tRSTmin Low Level of EN High Level of EN EN Switching Hysteresis Enable Pin pull-down Current Enable Reaction Time (reaction of OUTx) 1 -0.3 VCC *0.4 20 5 2.4 1.2 60 35 4 VCC *0.2 VCC 300 85 s V V mV A A s s 1) Limit Values Typ. 100 40 Max. VCC *0.2 VCC 300 85 - Unit Conditions VRSTl VRSTh VRSThy IRSTresh IRSTresl -0.3 VCC *0.4 20 20 2.4 V V mV A A 1) VRST=5V VRST=0.6V1) Enable Input Pin [EN] VENl VENh VENhy IENresh IENresl tENrr 1) VEN=5V VEN=0.6V1) 1) Minimum Enable Duration time EN tENmin 1) 1) Parameter not subject of production test. Specified by design. Data Sheet 18 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Reset and Enable Inputs VDD t VEN VENh VENl Enable not valid T< tENmin Device OFF Enable valid Device ON VENhy t OUTx Enable of Output OUTx OFF t ENrr tVDDpo Device operating t External _reset.vsd Figure 8 Timing Data Sheet 19 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Outputs 7 7.1 Power Outputs Description Power Outputs The TLE8110EE is a 10 channel low-side powertrain switch. The power stages are built by N-channel power MOSFET transistors. The device is a universal multichannel switch but mostly suited for the use in Engine Management Systems [EMS]. Within an EMS, the best fit of the channels to the typical loads is: * * * Channel 1 to 4 for Injector valves or mid-sized solenoids with a nominal current requirement of 1.5A. Channel 5 to 6 for mid-sized solenoids or Injector valves with a nominal current requirement of 1.7A Channel 7 to 10 for small solenoids or relays with a nominal current requirement of 0.75A Channel 1 to 10 provide enhanced clamping capabilities of typically 55V best suited for inductive loads such as injector valves. It is recommended in case of an inductive load, to connect an external free wheeling- or clamping diode, where-ever possible to reduce power dissipation. All channels can be connected in parallel. Channels 1 to 4, 5 to 6 and 7 to 10 are prepared by matching for parallel connection with the possibility to use a high portion of the capability of each single channel also in parallel mode (refer to Chapter 7.4). Channel 5 and 6 have a higher current shut down threshold to allow to connect in parallel mode a load with a high inrush-current, such as a lambda sensor heater. RST VCC VDD EN OUT1 IN1 IN2 IN3 gate control CH1 gate control CH2 temperature sensor INx input register diagnosis register control register short circuit detection open load detection short to GND detection OUT7 OUT8 OUT9 OUT10 OUT2 OUT3 OUT4 OUT5 OUT6 Serial and Parallel Input control (for details , see Chapter Control of the device" ) GND Block _diag_10ch_TLE8x10_Outputs .vsd Figure 9 Block Diagram of Control and Power Outputs Data Sheet 20 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Outputs 7.2 Description of the Clamping Structure When switching off inductive loads, the potential at pin OUT rises to VDS(CL) potential, because the inductance intends to continue driving the current. The voltage clamping is necessary to prevent destruction of the device, see Figure 10 for the principle clamping circuit. Nevertheless, the maximum allowed load inductance is limited. Vbat ID V DScl DS OUT V L, RL GND OutputClamp.vsd Figure 10 Principle Clamping Structure Maximum Load Inductance During demagnetization of inductive loads, energy has to be dissipated in the device. This energy can be calculated with following equation: V batt - V DScl RL IL L E = V DS(CL) ------------------------------- ln 1 - -------------------------------- + I L -----RL V batt - V DScl RL Following equation simplifies under the assumption of RL = 0: (1) V DScl 2 E = 1 LI L --------------------------------2 V DScl - V Batt The maximum energy, which is converted into heat, is limited by the thermal design of the component. (2) The Repetitive Clamping Energies EAR as defined in the following Chapter 7.3, Item 7.3.4 (and following items) are representing cummulated operating scenarios for one channel group with: * * * normal operating condition with a typical battery voltage of VBatt = 16V and an ambient temperature of typically Ta = 125C. cold operation with a typical battery voltage of typically VBatt = 13.5V and an ambient temperature of typically Ta = -40C. generator defect with a typical battery voltage of VBatt = 18V and an ambient temperature of typically Ta =135C. The Power Dissipation Pv is typically considered with Pv = 3W during normal operation. This power dissipation changes during the other operating conditions according the thermal behaviour of RDSon and the load Resistance RL. The interaction of both, together with an assumed typical Rthja = 7.5K/W, the given average junction temperature Tj is considered as the start temperature for the clamping process. Due to the fact, that the maximum possible Repetitive Clamping Energy EAR varies with the Load Current ID, partially optional operating points are specified within the scenarios. Those optional operating points are not considered as cummulative clamping pulses to the scenario. Data Sheet 21 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Outputs 7.3 Electrical Characteristics Power Outputs Electrical Characteristics: Diagnostics 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Min. Output Channel Resistance 7.3.1 On State Resistance CH1 to 4 Limit Values Typ. 0.3 0.45 0.25 0.35 0.6 0.85 Max. 0.6 0.5 1.2 Ohm Ohm Ohm Ohm Ohm Ohm Unit Conditions RDSon - IDnom=1,5A; Tj=25C1) IDnom=1,5A; Tj=150C IDnom=1.7A; Tj=25C1) IDnom=1.7A; Tj=150C IDnom=0.75A; Tj=25C1) IDnom=0.75A; Tj=150C 7.3.2 On State Resistance CH 5 to 6 RDSon - 7.3.3 On State Resistance CH7 to 10 RDSon - Clamping Energy Channel 1-4 7.3.4 Maximum Energy Dissipation per Channel. Repetitive Pulses. Operating Mode 600Mio. pulses over life time. Or Item 7.3.5 Maximum Energy Dissipation per Channel. Repetitive Pulses. Operating Mode 600Mio. pulses over life time. Maximum Energy Dissipation per Channel. Repetitive Pulses. Cold Operation: 0.5Mio. pulses over life time cumulated. Or Item 7.3.7 Maximum Energy Dissipation per Channel. Repetitive Pulses. Cold Operation 3Mio. pulses over life time cumulated. Maximum Energy Dissipation per Channel. Repetitive Pulses. Generator Defect 300k pulses over life time cumulated. Or Item 7.3.9 EAR - - 15 mJ ID = 1.25A Tj=145C 1) 7.3.5 EAR - - 21 mJ ID = 0.87A Tj=145C 1) 7.3.6 EAR - - 25 mJ ID = 1.73A Tj=-20C 1) 7.3.7 EAR - - 20 mJ ID = 0.87A Tj=-20C 1) 7.3.8 EAR - - 18 mJ ID =1.45A Tj=150C 1) Data Sheet 22 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Outputs Electrical Characteristics: Diagnostics (cont'd) 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. 7.3.9 Parameter Maximum Energy Dissipation per Channel. Repetitive Pulses. Generator Defect 300k pulses over life time cumulated. Symbol Min. Limit Values Typ. Max. 27 mJ ID = 0.98A Tj=150C 1) Unit Conditions EAR - 7.3.10 Maximum Energy Dissipation per EAR Channel. Repetitive Pulses. Jump Start 20k pulses over life time cumulated, max 1 min per cycle. Or Item 7.3.11 Maximum Energy Dissipation per Channel. Repetitive Pulses. Jump Start 20k pulses over life time cumulated, max 1 min per cycle. Maximum Energy Dissipation per Channel. Repetitive Pulses. Operating Mode 600Mio. pulses over life time. Maximum Energy Dissipation per Channel. Repetitive Pulses. Cold Operation 3Mio. pulses over life time cumulated. Maximum Energy Dissipation per Channel. Repetitive Pulses. Generator Defect 300k pulses over life time cumulated. Maximum Energy Dissipation per Channel. Repetitive Pulses. Jump Start 20k pulses over life time cumulated, max 1 min per cycle. - - 33 mJ ID = 1.82A Tj=95C 1) 7.3.11 EAR - - 50 mJ ID = 1.23A Tj=95C 1) Channel 5-6 7.3.12 EAR - - 24 mJ ID = 1.7A Tj=145C 1) 7.3.13 EAR - - 23 mJ ID = 1.72A Tj= -20C 1) 7.3.14 EAR - - 31 mJ IDS = 1.92A Tj=150C 1) 7.3.15 EAR - - 59 mJ ID = 2.43A Tj = 95C 1) Data Sheet 23 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Outputs Electrical Characteristics: Diagnostics (cont'd) 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Min. Channel 7-10 7.3.16 Maximum Energy Dissipation per Channel. Repetitive Pulses. Operating Mode 600Mio. pulses over life time. Maximum Energy Dissipation per Channel. Repetitive Pulses. Cold Operation 0.5Mio pulses over life time cumulated. Or Item 7.3.18 Maximum Energy Dissipation per Channel. Repetitive Pulses. Cold Operation 3Mio. pulses over life time cumulated. Maximum Energy Dissipation per Channel. Repetitive Pulses. Generator Defect 300k pulses over life time cumulated. Maximum Energy Dissipation per Channel. Repetitive Pulses. Jump Start 20k pulses over life time cumulated, max 1 min per cycle. Limit Values Typ. Max. 13 mJ ID = 0.49A Tj =145C 1) Unit Conditions EAR - 7.3.17 EAR - - 15 mJ ID = 0,54A Tj = -20C 1) 7.3.18 EAR - - 12 mJ ID = 0.49A Tj = -20C 1) 7.3.19 EAR - - 17 mJ ID = 0.55A Tj = 150C 1) 7.3.20 EAR - - 31 ID = 0.69A Tj = 95C 1) Leakage Current 7.3.21 Output Leakage Current in standby IDoff mode, Channel 1 to 4 3 A VDS=13.5V; VDD=5V, Tj=85C1) VDS=13.5V; VDD=5V, Tj=150C VDS=13.5V; VDD=5V, Tj=85C1) VDS=13.5V; VDD=5V, Tj=150C - - 8 A 7.3.22 Output Leakage Current in standby IDoff mode, Channel 5 to 6 - - 6 A - - 12 A Data Sheet 24 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Outputs Electrical Characteristics: Diagnostics (cont'd) 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. 7.3.23 Parameter Symbol Min. Output Leakage Current in standby IDoff mode, Channel 7 to 10 Limit Values Typ. Max. 2 A VDS=13.5V; VDD=5V, Tj=85C1) VDS=13.5V; VDD=5V, Tj=150C Unit Conditions - - 5 A Clamping Voltage 7.3.24 Timing 7.3.25 Output Switching Frequency Output Clamping Voltage, Channel VDScl 1 to 10 45 55 60 V fOUTx - - 20 kHz 1) resistive load duty cyle > 25%. 7.3.26 Turn-on Time tdON - 5 10 s VDS=20% of Vbatt Vbatt = 13.5V, IDS1 to IDS6 = 1A, IDS7 to IDS10 = 0.5A, resistive load VDS=80% of Vbatt Vbatt = 13.5V, IDS1 to IDS6 = 1A, IDS7 to IDS10 = 0.5A resistive load 7.3.27 Turn-off Time tdOFF - 5 10 s 1) Parameter is not subject to production test, specified by design. RDS_ON / Ohm 0,6 RON_vs_Tj_CH1-4,6.vsd RDS_ON vs. Tj : CH 1-4 (V DD=5V) 0,5 0,4 0,3 0,2 -40 -20 0 20 40 60 80 100 120 140 Tj/C Figure 11 Data Sheet CH 1-4: typical behaviour of RDS_ON versus the junction temperaure Tj 25 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Outputs RDS_ON / Ohm 0,5 RON_vs_Tj_CH5-6.vsd R DS_ON vs. Tj: CH 5-6 (VDD=5V) 0,4 0,3 0,2 0,1 -40 -20 0 20 40 60 80 100 120 140 Tj/C Figure 12 CH 5-6: typical behaviour of RDS_ON versus the junction temperaure Tj RDS_ON / Ohm 1.2 RON_vs_Tj_CH7-10.vsd RDS_ON vs. T j: CH 7-10 (V DD=5V) 1.0 0.8 0.6 0.4 -40 -20 0 20 40 60 80 100 120 140 Tj/C Figure 13 CH7-10: typical behaviour of RDS_ON versus the junction temperaure Tj Data Sheet 26 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Outputs VCL / V 57 VCL_vs_Tj_all_CH.vsd VCLn vs. Tj: all Channels 56 55 54 53 -40 -20 0 20 40 60 80 100 120 140 Tj/C Figure 14 All Channels: typical behaviour of the clamping voltage versus the junction temperature VINx VINh VINh VOUTx t VBATT 80% 20% t tdOFF Timing_Power_Outx _res1.vsd t dON Figure 15 Timing of Output Channel switching (resistive load) 7.4 Parallel Connection of the Power Stages The TLE8110EE is equipped with a structure which improves the capability of parallel-connected channels. The device can be "informed" via the PMx.PMx - bits (see chapter control of the device) which of the channels are connected in parallel. The input channels can be mapped to the parallel connected output channels in order to apply the PWM signals. This feature allows a flexible adaptation to different load situations within the same hardware setup. In case of overload the ground current and the power dissipation is increasing. The application has to take into account that all maximum ratings are observed (e.g. operating temperature TJ and total ground current IGND, see Maximum Ratings). In case of parallel connection of channels with or w/o PM-bit set, the maximum clamping energy defined by the derating factor must not be exceeded. All stages are switched on and off simultaneously. The C has to ensure that the stages which are connected in parallel have always the same state (on or off). The PM-bit should be set according to the parallel connected power stages in order to achieve the best possible de-rating factors. Data Sheet 27 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Outputs The performance during parallel connection of channels is specified by design and not subject to the production test. The given factors are maximum values. All channels at the same junction temperature level. I_FACTOR The maximum operating current IDSD,OUTxy(sum) is the minimum "Current Shut-down Threshold Low" IDSD(low),n(min). * * IDSD,OUTxy(sum) = I_FACTOR * SUM[IDSD(low),n(min)] with I_FACTOR = 1. ID,OUTxy(sum) = I_FACTOR * SUM[ID(typ),n] The typical maximum operating current IDSD,OUTxy(sum) is the "Current Shut-down Threshold Typ" IDSD(typ),n(min). E_FACTOR The Maximum Clamping Energy EARxy(sum) of parallel connected channels is defined as follows: * EAR,xy(sum) = E_FACTOR * SUM[EAR,n] at Tj = 150C and ID = IDnom ON-Resistance The typical ON-Resistance RDSon,xy(sum) of parallel connected channels is sum of the typical RDSon RDSon,n(typ) defined as follows * RDSon,xy(sum) = 1/[1/RDSon,n(typ) + 1/RDSon,n+1(typ)] Derating Factors1) 2) in case of Parallel Connection of Channels: related PM-Bit set Channel Group 7.4.1 CH 1-4 Parameter typical shut down current before reaching IDSD(typ),n ID,OUTxy(sum) 2 CH parallel I_FACTOR = 0.95 3 CH parallel I_FACTOR = 0.90 4 CH parallel I_FACTOR = 0.85 7.4.2 Maximum Clamping E_FACTOR = 0.8 Energy EARxy(sum) typical ONResistance E_FACTOR = 0.7 E_FACTOR = 0.6 7.4.3 RDSon,xy(sum) RDSon,xy(sum) RDSon,xy(sum) RDSon,xy(sum) 7.4.4 CH 5-6 typical shut down current before reaching IDSD(typ),n ID,OUTxy(sum) I_FACTOR = 0.95 - 7.4.5 Maximum Clamping E_FACTOR = 0.8 Energy EARxy(sum) typical ONResistance - - 7.4.6 RDSon,xy(sum) - - RDSon,xy(sum) Data Sheet 28 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Outputs Derating Factors1) 2) in case of Parallel Connection of Channels: related PM-Bit set Channel Group 7.4.7 CH 7-10 Parameter typical shut down current before reaching IDSD(typ),n ID,OUTxy(sum) 2 CH parallel I_FACTOR = 0.95 3 CH parallel I_FACTOR = 0.90 4 CH parallel I_FACTOR = 0.85 7.4.8 Maximum Clamping E_FACTOR = 0.8 Energy EARxy(sum) typical ONResistance E_FACTOR 0.7 E_FACTOR 0.6 7.4.9 RDSon,xy(sum) RDSon,xy(sum) RDSon,xy(sum) RDSon,xy(sum) 1) The performance during parallel connection of channels is specified by design and not subject to the production test. 2) All channels at the same junction temperature level. Derating Factors1)2) in case of Parallel Connection of Channels: related PM-Bit not set Channel Group 7.4.10 CH 1-4 Parameter typical shut down current before reaching IDSD(typ),n ID,OUTxy(sum) 2 CH parallel I_FACTOR = 0.95 3 CH parallel I_FACTOR = 0.90 4 CH parallel I_FACTOR = 0.85 7.4.11 Maximum Clamping E_FACTOR = 0.5 Energy EARxy(sum) typical ONResistance E_FACTOR = 0.33 E_FACTOR = 0.25 7.4.12 RDSon,xy(sum) RDSon,xy(sum) RDSon,xy(sum) RDSon,xy(sum) 7.4.13 CH 5-6 typical shut down current before reaching IDSD(typ),n ID,OUTxy(sum) I_FACTOR = 0.95 - 7.4.14 Maximum Clamping E_FACTOR = 0.5 Energy EARxy(sum) typical ONResistance - - 7.4.15 RDSon,xy(sum) - - RDSon,xy(sum) Data Sheet 29 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Power Outputs Derating Factors1)2) in case of Parallel Connection of Channels: related PM-Bit not set Channel Group 7.4.16 CH 7-10 Parameter typical shut down current before reaching IDSD(typ),n ID,OUTxy(sum) 2 CH parallel I_FACTOR = 0.95 3 CH parallel I_FACTOR = 0.90 4 CH parallel I_FACTOR = 0.85 7.4.17 Maximum Clamping E_FACTOR = 0.5 Energy EARxy(sum) typical ONResistance E_FACTOR = 0.33 E_FACTOR = 0.25 7.4.18 RDSon,xy(sum) RDSon,xy(sum) RDSon,xy(sum) RDSon,xy(sum) 1) The performance during parallel connection of channels is specified by design and not subject to the production test. 2) All channels at the same junction temperature level. Data Sheet 30 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Diagnosis 8 8.1 Diagnosis Description Diagnosis The TLE8110EE provides diagnosis information about the device and about the load. Following diagnosis flags have been implemented for each channel: * * * The diagnosis information of the protective functions, such as "over current" and"over temperature" The open load diagnosis The short to ground information. Updating the Diagnosis is based on a filter-dependent standard delay time of typ. 150s. This value is set as a default. Refer to Figure 16 for details. Application Hint: In specific application cases - such as driving Uni-Polar Stepper Motor - it might be possible, that reverse currents flow for a short time, which possibly can disturb the diagnosis circuit at neighboring channels and cause wrong diagnosis results of those channels. To reduce the possibility, that this effect appears in a certain timing range, the filter time of Channels 7 to 10 can be extended to typ. 2.5ms or typ. 5ms by setting the "Diagnosis Blind Time" - Bits (DBTx). If Channels 7 to 10 are used for driving loads causing reverse currents, they influence each other and additionally might affect Channels 5 and 6 . It is recommended to use the channels 7 + 8 and 9 + 10 as pairs for anti-parallel control signals, such as for the stepper motors. For logic setting details, see chapter "Control of the Device" VDD Diagnosis Register MUX 00 01 10 IDSsg Latch OUTn Latch VDSsg IDSpd VDSol Temp. Sensor gate control n Latch OR n protective functions GND Diagnosis-serial.vsd Figure 16 Block Diagram of Diagnosis Data Sheet 31 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Diagnosis 8.2 Electrical Characteristics Diagnosis Electrical Characteristics: OFF State Diagnosis 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Min. Open Load Diagnosis 8.2.1 8.2.2 8.2.3 Open load detection threshold voltage Limit Values Typ. 2.60 90 Max. 3.20 150 220 V A s VDS = 13.5 V DEVS.DBT1=0 DEVS.DBT2=1 or 0 DEVS.DBT1=1 DEVS.DBT2=0 DEVS.DBT1=1 DEVS.DBT2=1 Unit Conditions VDSol 2.00 50 100 Output pull-down diagnosis current IDpd per channel (low level) Open Load Diagnosis Delay Time (all channels) td 8.2.4 a) b) Channel 7-10: td Open Load Diagnosis Delay Time "Diagnosis Blind Time" see chapter "Control of the device" Figure 17, Figure 18 Short to ground detection threshold VDSsg voltage Output diagnosis current for short to ground per channel (low level) Short to GND Diagnosis Delay Time Channel 7-10: Short to GND Diagnosis Delay Time. "Diagnosis Blind Time" see chapter "Control of the device", Figure 17, Figure 18 1.65 3.3 2.5 5 3.45 7.3 ms ms Short to GND Diagnosis 8.2.5 8.2.6 8.2.7 1.00 -150 100 1.50 -100 2.00 -50 220 V A s VDS = 0V DEVS.DBT1=0 DEVS.DBT2=1 or 0 DEVS.DBT1=1 DEVS.DBT2=0 DEVS.DBT1=1 DEVS.DBT2=1 IDsg td 8.2.8 a) b) td 1.65 3.3 2.5 5 3.45 7.3 ms ms Data Sheet 32 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Diagnosis Diagnosis Blind Time [DBT] activation DBT is triggered by Open Load [OL] or Short-to-Ground [SG] -detection during OFF-condition of CH7-10. DBT is activated by DEVS.DBT1, DEVS.DBT2 (see Control of the device"). INx Signal ON Channel 7 - 10 OFF OL, SG -Diagnosis active Output Voltage Diagnosis Blind Time [DBT] triggered by Diagnostic Incident Incident - e.g. temporal short to GND" [SG] Diagnosis Blind Time [DBT] active DBT Blind" window finishes as soon as the error disappears within the DBT Diagnostic Register Entry, because Failure present after ending DBT Diagnosis Register : 11: No Error 10: Over Load 01: Open Load 00: Short to Ground t err < tDBT t err< tDBT terr > t DBT 11 11 11 00 DBT.vsd Figure 17 Diagnosis Blind Time Channel OFF YES OL, SGError present? YES OL, SGError detected DBT Counter SET 0 = tDBT Decrement DBT Counter OL, SGError present? Yes No Counter t > tDBT Yes Failure detected => Register Entry No Reset Counter (finish DBTframe) DBT_Flow. vsd Figure 18 Data Sheet Diagnosis Blind Time - Logic Flow 33 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Parallel Inputs 9 9.1 Parallel Inputs Description Parallel Inputs There are 10 input pins available are on TLE8110EE to control the output stages. Each input signal controls the output stages of its assigned channel. For example, IN1 controls OUT1, IN2 controls OUT2, etc. A "Low"-Signal at INx switches the related Output Channel off. The zener diode protects the input circuit against ESD pulses. For details about the Boolean operation, refer to the chapter "Control of the device", for details about timing refer to Figure 11. 9.2 Electrical Characteristics Parallel Inputs Electrical Characteristics: Diagnostics 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Min. Parallel Inputs 9.2.1 9.2.2 9.2.3 Low Level of parallel Input pin High Level of Parallel Input pin Parallel Input Pin Switching Hysteresis Limit Values Typ. 60 40 Max. VCC* 0.2 VCC 300 85 V V mV A A 1) Unit Conditions VINxl VINxh VINxhy IINxh IINxl -0.3 VCC* 0.4 15 20 2.4 9.2.4 a) Input Pin pull-down Current .........b) VINx=5V VINx=0.6V1) 1) Parameter not subject to production test. Specified by design. Data Sheet 34 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Protection Functions 10 Protection Functions The device provides embedded protective functions. Integrated protection functions are designed to prevent IC destruction under fault conditions described in this Document. Fault conditions are considered "outside" the normal operating range. Protection functions are not designed for continuous repetitive operation. There is an over load and over temperature protection implemented in the TLE8110EE. If a protection function becomes active during the write cycle of Diagnosis Information into the Diagnosis Register, the information is latched and stored into the diagnosis register after the write process. In order to achieve a maximum protection, the affected channel with over current or over temperature is switched off. The device can be configured via serial communication interface in three ways in order to react on this fault condition: * after switching off, turning on again after a delay time: In case of over temperature, when the temperature has decreased below the temperature shut down threshold. In case of over-current, the affected channel is turning on after a delay time until the over temperature protection is activated. after switching off, turning on again the affected channel with the next parallel or serial control command. Default Setting: after switching off latching the condition and remain off until the Diagnosis Register is cleared via serial control. In this case, the internal Diagnosis Bits for Over Temperature and Over Current are cleared with the rising edge of S_CS * * For the failure condition of Reverse Currents, the device contains a "Reverse Current Protection Comparator" [RCP]. This RCP can optionally be activated by setting the DEVS.RCP Bit. In case the comparator is activated, it detects a reverse current and switches ON the related output channel. The channel is kept ON up to a reverse current channel dependent threshold IRCP_off. This threshold is defined by regulators target value to keep the output voltage at >/~-0.3V. If the current exceeds a defined value, the comparator switches OFF and other protection functions are protecting the circuit against reverse current. That means that at higher currents / or in case RCP is de-activated / not activated, the reverse current is flowing through the body diode of the DMOS. In that case, the voltage drops to typically -0.6V according the voltage of the body diode. In case the comparator threshold has been exceeded and the RCP has been switched OFF, the functions remains OFF until the reverse current arrives back to zero reverse current. Only then, the comparator can be activated again after a delay time tRCP_on_delay. This function reduces the un-wanted influence of a reverse current to the analogue part of the circuit (such as the diagnosis). For more details about the functionality, see Figure 21 and Figure 22 and concerning the settings and the related registers, refer to Chapter "Control of the Device". Figure 19 gives an overview about the protective functions. RCP Logic Ctrl. Ref. -300mV OUTx temperature sensor T gate control Serial control short circuit detection Block_diag_Protection.vsd Figure 19 Data Sheet Block Diagram Protection Functions 35 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Protection Functions 10.1 Electrical Characteristics Overload Protection Function Electrical Characteristics: Overload Protection Function 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Min. Over Current Protection 10.1.1 10.1.2 10.1.3 10.1.4 Output Current Shut-down Threshold Low (Channel 1 to 4) Output Current Shut-down Threshold Low (Channel 5 to 6) Output Current Shut-down Threshold Low (Channel 7 to 10) Output Current Shut-down Threshold High (Channel 1 to 4) Output Current Shut-down Threshold High (Channel 5 to 6) Output Current Shut-down Threshold High (Channel 7 to 10) Short Overload shutdown Delay Time (all Channels) Long Overload shutdown Delay Time (all Channels) Automatic Restart Delay Time2) in case of over current Limit Values Typ. 3.8 4.85 2.3 1.5 * Max. 5 6.00 2.9 A A A A 1) Unit Conditions IDSD(low) IDSD(low) IDSD(low) IDSD(high) 2.6 3.70 1.7 - IDSD (low) 10.1.5 IDSD(high) - 1.5 * - A 1) IDSD (low) 10.1.6 IDSD(high) - 1.5 * - A 1) IDSD (low) 10.1.7 tOFFcl_h 5 21 40 s valid for "Output Current Threshold High" 1) valid for "Output Current Threshold Low" 1) 10.1.8 tOFFcl_l 10 40 70 s 10.1.9 taONd 70 - 200 s Over Temperature Protection 10.1.10 Thermal Shut Down Temperature 10.1.11 Thermal Shut Down Hysteresis 10.1.12 Automatic Restart Delay Time2) in case of over temperature TjSD TjSDh taONd 175 10 70 190 - 205 20 200 C K s 1) 1) 1) Data Sheet 36 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Protection Functions Electrical Characteristics: Overload Protection Function (cont'd) 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Min. Reverse Current Protection 10.1.13 Reverse Current Comparator Switch-off Current level CH 1 - 4 10.1.14 Reverse Current Comparator Switch-off Current level CH 5 - 6 10.1.15 Reverse Current Comparator Switch-off Current level CH 7 - 10 10.1.16 Reverse Current Comparator switch on delay time Limit Values Typ. -0.9 -0.6 -0.45 24 Max. A A A s DEVS.RCP = 11) Tj = 25C DEVS.RCP = 11) Tj = 25C DEVS.RCP = 11) Tj = 25C DEVS.RCP = 11) Tj = 25C Unit Conditions IRCP_off IRCP_off IRCP_off tRCP_on_ delay - 1) Parameter not subject to production test. Specified by design. 2) Only active when LOTCx[1:0] = 10 and as long as no overload or overtemperature condition present. In case the channel is switched off the delay time is cleared. The application must avoid to exceed the IDSD- and maximum ratings specification. Otherwise a damage or reduction of the lifetime can be expected. Data Sheet 37 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Protection Functions Channel ON/OFF No Reaction on ON/OFF because LOCT[1:0] = 00 t ID IDSD t TJ TjSD t CLn t OFFd_l taONd tOFFd_l tOFFd t x_CS LOTC [1:0] = 10 auto re -start LOCT changed to : LOTC[1:0] = 01 restart after Ch -ON command ON Command to Ch given and LOCT changed to : LOCT[1:0] = 00 = start after clear Diagnosis Reg . Diagnosis Register Clear t Channel ON/OFF No Reaction on ON/OFF because LOCT[1:0] = 00 t ID IDSD t TJ TjSD TjSDh td OTn t t x_CS LOTC [1:0] = 10 auto re -start LOCT changed to : LOTC[1:0] = 01 restart after Ch -ON command ON Command to Ch given and LOCT changed to : LOCT[ 1:0] = 00 = start after clear Diagnosis Reg . Diagnosis Register Clear t Timing_Protection .vsd Figure 20 Data Sheet Timing (CLn: Over Current Latch; OT: Over Temperature Flag; x_CS: Chip-Select) 38 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Protection Functions ID Leakage (neighbour channel) RCP not active RCP active Reverse Current Comparator Switch-off Current level IRCP_off Reverse Current ID 0 Reverse Current Comparator Switch-off Current level t IRCP_off Maximum Rating -IDSD(low) VD VBatt 0 ~ - 300mV t tRCP_on_delay RCP active: RCP not active: Regulation to ID through Body VD ~ - 300mV; Diode of DMOS -ID through DMOS RCP.vsd Figure 21 Reverse Current Protection Comparator Data Sheet 39 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Protection Functions -40 -0.1 -20 0 20 40 60 80 100 120 140 Tj / C -0.3 CH7-10 CH5-6 -0.5 CH1-4 -0.7 -0.9 -1.1 -1.3 -1.5 IRCP_off /A IRCP_OFF_TC.vsd Figure 22 Reverse Current Protection Comparator (typical behaviour vs junction temperature) Data Sheet 40 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch 16 bit SPI Interface 11 11.1 16 bit SPI Interface Description 16 bit SPI Interface The diagnosis and control interface is based on a serial peripheral interface (SPI). The SPI is a full duplex synchronous serial slave interface, which uses four lines: S_SO, S_SI, S_CLK and S_CS. Data is transferred by the lines S_SI and S_SO at the data rate given by S_CLK. The falling edge of S_CS indicates the beginning of a data access. Data is sampled in on line S_SI at the falling edge of S_CLK and shifted out on line SO at the rising edge of SCLK. Each access must be terminated by a rising edge of S_CS. A modulo 8 counter ensures that data is taken only, when a multiple of 8 bit has been transferred. If in one transfer cycle not a multiple of 8 bits have been counted, the data frame is ignored. The interface provides daisy chain capability. S_SO S_SI S_CS S_CLK time MSB MSB 14 14 13 13 12 12 11 11 10 10 9 9 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 LSB LSB SPI.vsd Figure 23 16 bit SPI Interface The SPI protocol is described in Chapter "Control of the device". Concerning Reset of the SPI, please refer to the chapter "Reset" 11.2 Timing Diagrams t CS lead t t CSlag SCLKp t CStd 0.7V dd 0.2V dd S_CS t SCLKh t SCLKl S_CLK t SIsu 0.7V dd 0.2V dd t SIh 0.7V dd 0.2V dd S_SI tSO(en ) t SOv t SOdis S_SO 0.7V dd 0.2V dd Figure 24 Data Transfer in Daisy Chain Configuration Data Sheet 41 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch 16 bit SPI Interface 11.3 Electrical Characteristics 16 bit SPI Interface Electrical Characteristics: Diagnostics 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Min. Input Characteristics (CS, SCLK, SI) 11.3.1 L level of pin S_CS S_CLK S_SI 11.3.2 H level of pin S_CS S_CLK S_SI Limit Values Typ. Max. VCC* 0.2 Unit Conditions -0.3 V - VS_CSl VS_CLKl VS_SIl VCC* 0.4 - 11.3.3 11.3.4 a) b) 11.3.5 a) b) VS_CSh VS_CLKh VS_SIh VS_CShy Hysteresis Input Pins VS_CLKhy VS_SIhy IS_CLKh Input Pin pull-down Current IS_SIh S_CLK IS_CLKl S_SI IS_SIl IS_CSh Input Pin pull-up Current S_CS VCC V - 20 100 300 mV - 20 2.4 -4 -20 40 -40 85 -85 A A A A VIN=5V VIN=0.6V1) VS_CS = 2 V, VCC=3.3V VS_CS = 0 V, VCC=5V IS_SO = -2 mA IS_SO = 1.5 mA VS_SO = Vcc -CL = 50 pF 1) 1) 1) 1) 1) IS_CSl Output Characteristics (SO) 11.3.6 11.3.7 11.3.8 Timings 11.3.9 11.3.10 11.3.11 11.3.12 11.3.13 11.3.14 11.3.15 11.3.16 11.3.17 11.3.18 Serial clock frequency Serial clock period Serial clock high time Serial clock low time Enable lead time (falling CS to rising SCLK) Enable lag time (falling SCLK to rising CS) Transfer delay time (rising CS to falling CS) Data setup time (required time SI to falling SCLK) Data hold time (falling SCLK to SI) Output enable time (falling CS to SO valid) L level output voltage H level output voltage Output tristate leakage current VS_SOl VS_SOh IS_SOoff fS_CLK tS_CLK(P) tSCLK(H) tSCLK(L) tCS(lead) tCS(lag) tCS(td) tSI(su) tSI(h) tSO(en) 0 - 0.4 V Vcc 0.4 V -10 0 200 50 50 250 250 250 20 20 - Vcc 10 5 200 A MHz ns ns ns ns ns ns ns ns ns 1) 1) 1) 1) CL = 50 pF 1) Data Sheet 42 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch 16 bit SPI Interface Electrical Characteristics: Diagnostics (cont'd) 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. 11.3.19 11.3.20 Parameter Output disable time (rising CS to SO tristate) Output data valid time with capacitive load Symbol Min. Limit Values Typ. - Unit 200 100 ns ns Conditions CL = 50 pF 1) CL = 50 pF 1) Max. tSO(dis) tSO(v) - 1) Not subject to production test, specified by design. Data Sheet 43 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device 12 Control of the device This chapter describes the SPI-Interface signals, the protocol, registers and commands. Reading this chapter allows the Software Engineer to control the device. The chapter contains also some information about communication safety features of the protocol. 12.1 Internal Clock The device contains an internal clock oscillator. Electrical Characteristics: Diagnostics 3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Min. Parallel Inputs 12.1.1 internal clock oscillator frequency Limit Values Typ. 500 Max. kHz 1) Unit Conditions fint_osc - 1) Parameter not subject to production test. Specified by design. 12.2 12.2.1 SPI Interface. Signals and Protocol Description 16 bit SPI Interface Signals S_CS - Chip Select: The system micro controller selects the TLE8110EE by means of the S_CS pin. Whenever the pin is in low state, data transfer can take place. When S_CS is in high state, any signals at the S_CLK and S_SI pins are ignored and S_SO is forced into a high impedance state. S_CS High to Low transition: * * The information to be transferred loaded into the shift register (16-bit Protocol). S_SO changes from high impedance state to high or low state depending on the logic OR combination between the transmission or error flag [TOR] (see Chapter 12.2.4.3) and the signal level at pin S_SI. As a result, even in daisy chain configuration, a high signal indicates a faulty transmission or an existing error on one of the Output Channels. The transmission error flag is set after RST, so a reset between two SPI commands is indicated. S_CS Low to High transition: * Command decoding is only done, when after the falling edge of CS exactly a multiple (1, 2, 3, ...) of eight S_CLK signals have been detected. (See Modulo-8 Counter: Chapter 12.2.4.2) Data Sheet 44 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device S_CLK - Serial Clock: This input pin clocks the internal shift register. The serial input (S_SI) transfers data is shifted into the register on the falling edge of S_CLK while the serial output (S_SO) shifts the information out on the rising edge of the serial clock. It is essential that the S_CLK pin is in low state whenever chip select CS makes any transition. S_SI - Serial Input: Serial input data bits are shifted in at this pin, the most significant bit first. The bit at the S_SI Pin is read on the falling edge of S_CLK. S_SO Serial Output: Data is shifted out serially at this pin, the most significant bit first. S_SO is in high impedance state until the S_CS pin goes to low state.The next bits will appear at the S_SO pin following the rising edge of S_CLK. 12.2.2 Daisy Chain Capability The SPI-Interface of TLE8110EE provides daisy chain capability. In this configuration several devices are activated by the same S_CS signal. The S_SI line of one device is connected with the S_SO line of another device (see Figure 25), which builds a chain. The ends of the chain are connected with the output and input of the master device, S_SO and S_SI respectively. The master device provides the master clock CLK, which is connected to the S_CLK line of each device in the chain. By each clock edge on S_CLK, one bit is shifted into the S_SI. The bit shifted out can be seen at SO. After 16 S_CLK cycles, the data transfer for one device has been finished. In single chip configuration, the S_CS line must go high to make the device accept the transferred data. In daisy chain configuration the data shifted out at device 1 has been shifted in to device 2. Example: When using three devices in daisy chain, three times 16 bits have to be shifted through the devices. After that, the S_CS line must go high (see Figure 25). SI SO CS CLK time SO device 3 SI device 3 SO device 2 SI device 2 SO device 1 SI device 1 SPI_DasyChain2.emf Figure 25 Principle example for Data Transfer in Daisy Chain Configuration Note: Due to the integrated modulo 8 counter, 8 bit and 16 bit devices can be used in one daisy chain. 12.2.3 SPI Protocol The device contains two protocol styles which are applied dependent of the used commands. There is the standard 16-bit protocol and the 2x8-bit protocol. Both protocols can appear also be mixed. 12.2.3.1 16-bit protocol Each Cycle where a serial data or command frame is sent to the S_SI of the SPI interface, a data frame is returned at the same time by the S_SO The content of the S_SO frame is dependent on the previous command which has been sent to S_SI. Read Command (R/W = R) returns one cycle later the content of the addresses register. (see Figure 26 ). Data Sheet 45 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device S_CS S_SI R S_SO TOR ADR / DATA W ADR / DATA R ADR / DATA dept. of previous R/W TOR Register TOR Short Diagnosis* SPI_Protocol_Normal_Mode.vsd * dependent on ADR; In case CMD or DCC is addressed, related content. Figure 26 16-bit protocol S_SI Serial Input 15 W/R Reset Value: N.A. 13 ADDR 14 12 11 10 9 8 7 6 5 4 3 2 1 0 DATA / CMD Field W/R Bits 15 Description W/R - Write / Read 0 Write register: The register content of the addressed register will be updated after CS low high transition. After sending a WRITE command, the device returns data according the addressed register 1 Read register: The register content of the addressed register will be sent in the next frame. ADDR - Address Pointer to register for read and write command DATA_CMD - Data / Command Data written to or read from register selected by address ADDR ADDR DATA/CMD 14:12 11:0 S_SO Serial Output CS TOR 15 PAR 14 13 ADDR 12 Reset Value: xxxx xxxx xxxx xxxxB1) 11 10 9 8 7 6 5 4 3 2 1 0 DATA 1) after reset is send a Short Diagnosis and Device Status CMD_CSDS, see Chapter 12.3.1.2. Field TOR Bits CS Description Transmission or Output Error (see Chapter 12.2.4.2) 0 Previous transmission was successful, no error, no reset. 1 Previous transmission failed, Error on one of the Output Channels, under voltage reset* or first transmission after reset. * OR operated diagnosis information of all Output Channels. (To read out details perform CMD_RSDS, see Chapter 12.3.1.2) Data Sheet 46 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device Field PAR Bits 15 Description PAR - Parity Bit 1: odd number of '1' in data and address field 0: even number of '1' in data and address field Address Address which has bin addressed Data Content of Address or feedback Data ADDR DATA 14:12 11:0 Note: Reading a register needs two SPI frames. In the first frame the RD command is sent. In the second frame the output at SPI signal SO will contain the requested information. A new command can be executed in the second frame. 12.2.3.2 2x8-bit protocol Each Cycle where a serial data or command frame is sent to the S_SI of the SPI interface, a data frame is returned at the same time by the S_SO. The content of the S_SO frame is dependent of the previous command which has been sent to S_SI and the content of the actual content of S_SI: The first Upper Byte send to S_SI controls the content of the Lower Byte actual returned by S_SO. The Lower Byte send to S_SI controls the Lower Byte in S_SO of the next frame. (see Figure 27 ). Upper Byte Upper Byte Lower Byte Upper Byte Upper Byte Lower Byte Lower Byte Upper Byte Upper Byte Lower Byte Lower Byte TOR DO TOR TOR SPI_Protocol_2x8bit.vsd Figure 27 2x8-bit protocol Data Sheet 47 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device S_SI Serial Input 15 14 13 12 11 10 9 Reset Value: N.A. 8 7 6 5 4 3 2 1 0 Upper Byte Lower Byte Field Upper Byte Bits 15:8 Description Upper Byte contains the command, which is performed after sending 8 bit to S_SI. The action out of this command is affecting the Lower Byte of S_SO of the actual communication frame. Lower Byte contains the command and data, which is performed at the end of the actual communication frame. The action out of this command is affection the Upper Byte of S_SO of next communication frame. Lower Byte 7:0 S_SO Serial Output CS TOR 15 14 13 12 Reset Value: xxxx xxxx xxxx xxxxB1) 11 10 9 8 7 6 5 4 3 2 1 0 Upper Byte Lower Byte 1) after reset is send a Short Diagnosis and Device Status CMD_CSDS, see Chapter 12.3.1.2. Field TOR Bits CS Description Transmission or Output Error (see Chapter 12.2.4.2) 0 Previous transmission was successful, no error, no reset. 1 Previous transmission failed, Error on one of the Output Channels, under voltage reset* or first transmission after reset. * OR operated diagnosis information of all Output Channels. (To read out details perform CMD_SDS, see Chapter 12.3.1) Upper Byte contains the data according the command and data in the Lower Byte of the previous communication Frame. Lower Byte contains the data according the command in the Upper Byte of the actual communication frame Upper Byte 15:8 Lower Byte 7:0 Note: Reading a register needs two SPI frames. In the first frame the RD command is sent. In the second frame the output at SPI signal SO will contain the requested information. A new command can be executed in the second frame. 12.2.3.3 16- and 2x8-bit protocol mixed. The 16-bit and 2x8-bit protocols are mixed according the used commands (see Chapter 12.3.1). Specially care should be taken, changing from the 16-bit protocol to the 2x8-bit protocol. In this case, it is important to send a NOP command to S_SI. Otherwise, by sending instead a Command, a collision between the S_SO data in the following frame and the Lower Byte of the 2x8-bit protocol will happen (see Chapter 12.2.3.2). Data Sheet 48 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device Protocol Change from 2x8-bit to 16-bit S_CS S_SI Upper Byte Upper Byte Lower Byte Lower Byte CMD CMD S_SO TOR TOR Upper Byte 0 TOR Data Protocol Change from 16-bit to 2x8-bit S_CS S_SI NOP S_SO TOR Data TOR Upper Byte Lower Byte Lower Byte Upper Byte Upper Byte Lower Byte Lower Byte 0 TOR Critical Protocol Change from 16-bit to 2x8-bit S_CS 2x8-bit protocol is dominant S_SI CMD S_SO TOR Data TOR Upper Byte Lower Byte Lower Byte Upper Byte Upper Byte Lower Byte Lower Byte Data... TOR collission SPI_Protocol_16_2x8bit_mixed.vsd Figure 28 16-bit protocol 12.2.4 safeCOMMUNICATION The devise contains some safety features, which are improving the protecting of the application against malfunction in case of disturbance of the communication between the Micro Controller and the Device: 12.2.4.1 Encoding of the commands The Commands are encoded. In case other bit-patterns, then the defined once are received, the commands are ignored and the communication error is indicated in the TOR-Bit (see Chapter 12.2.4.3) and can be read out in detail with the command CMD_RSDS (seeChapter 12.3.1.2). 12.2.4.2 Modulo-8 Counter The modulo is the integral remainder in integral division. In data communications, a modulo based approach is used to ensure that user information in SPI protocols is in the correct order. The device has a receiver-side counter, and a defined counter size. The modulo counter specifies the number of subsequent numbers available. In case of TLE8110EE Modulo 8 counter specifies 8 serial numbers. The modulo 8 counter ensures that data is taken only, when a multiple of 8 bit has been transferred. If in one transfer cycle not a multiple of 8 bits have been counted, the data frame is ignored and a Communication Error is indicated in the TOR-Bit (see Chapter 12.2.4.3) and in the CMD_RSDS - Feedback (seeChapter 12.3.1.2). Data Sheet 49 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device 12.2.4.3 TOR - Transmission or Diagnosis Error Bit As described in Chapter 12.2.3.1 and Chapter 12.2.3.2 the Transmission or Diagnosis Error bit [TOR] appears on S_SO, as soon as CS makes a High-to-LOW transition until the first rising edge of the clock signal. The TOR contains ONLY error information which has appeared in and since last frame. TOR does not contain any latched information. * * Command Ignored and Modulo 8: In the next frame after the error, the TOR bit will be set once. Under voltage: After digital- or analogue under voltage, the TOR of the first transmission contains the error information. In the following transmissions, the information is not shown anymore. But the under voltage information is latched in the CMD_CSDS bit until it is cleared (see Chapter 12.3.1). OR operated Diagnosis or protection error information: If one of those errors has appeared since the last frame, the information change is shown in the TOR bit. (The error is latched in the related Diagnosis and Error register and remains there until it is cleared). But the TOR bit will show the information-change only once. In the next frame, the TOR bit is cleared again * The information about the data transmission, TOR contains, is always from the previous transmission. The Diagnosis information, the Bit contains is the status of the diagnosis until the CS high-to-low transition. Changes in the diagnosis during the transmission are latched and stored until the next read-out cycle. By read-out of the TOR-bit, no stored information is cleared. The Error information can be read out in detail, by sending the command CMD_SDS and can be cleared (NOT Diagnosis Error) by the command CMD_CSDS (see Chapter 12.3.1) In order to reduce the Micro Controller work load, it is possible to read out the TOR bit also without constructively data transfer. That means, by just toggling CS, the status can be read out. To allow using the TOR Bit also in SPI-Daisy-Chain configuration, the TOR-Bit is OR operated with S_SI which contains the TOR information of the previous device in the Daisy-Chain. 12.3 Register and Command - Overview This Chapter describes the Registers and Commands. The commands allow to carry through some actions, such as reading out or clearing the diagnosis or reading out the Input Pins. Specially highlighted here should be the encoded CMD_DMSx/OPSx commands - compactCONTROL -, a highly efficient command-set to set a part of the output pins and read out the diagnosis at the same time. Included in this command set is the possibility to check, if the communication works well as also the possibility to read-out some of the parallel Input Pins INx. Using this compact command set can reduce the workload of the micro-controller during run-time significantly. CMD_RSD is preformed and short diagnostics [SD] is returned after each Write Cycle to any of the writable registers. After start-up of the device, the registers are loaded with the default settings as described below in the register descriptions. The Registers are cleared and set back to the default values, when a low signal is applied to the pin RST or an under-voltage condition appears at the supply pin VCC what causes an under-voltage reset. If a low signal at pin EN is applied or an under-voltage condition appears at pin VDD, the Registers are not cleared. Data Sheet 50 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device Table 1 Name CMD DCC OUTx DEVS MSCS ISAx ISBx PMx Type Addr W W 1) 1) Short Description Commands Diagnosis Registers and Compact Control Output Control Register CHx. Device Settings reserved Input or Serial Mode Register CHx Bank A Input or Serial Mode Register CHx Bank B Parallel Mode Control of CHx with CHy see: Chapter 12.3.1 Chapter 12.3.2 Chapter 12.3.3 Chapter 12.3.6 Chapter 12.3.4 Chapter 12.3.4 Chapter 12.3.5 000B 001B 010B 011B 100B 101B 110B 111B W/R W/R W/R W/R W/R W/R 1) if a read command is send, the command is ignored and S_SO returns a frame with '0'. Table 2 Register Overview Name CMD DCC OUTx DEVS Addr W2) W2) W/R W/R W/R W/R W/R W/R 000B 001B 010B 011B 100B 101B 110B 111B 11 0 10 1 9 1 8 1 7 6 5 4 3 2 1 0 def.1) ----- Command Command 1 RCP 1 DBT2 OUT 10 DBT1 OUT9 LOTC 70 [1] OUT8 LOTC 70 [0] OUT7 LOTC 16 [1] OUT6 LOTC 16 [0] OUT5 0 OUT4 0 OUT3 DCC 10 OUT2 DCC 9 OUT1 C00h DCC 18 007h MSCS ISAx ISBx PMx reserved IS6 0 0 0 0 0 0 IS5 0 0 IS4 IS10 PM91 0 PM89 IS3 IS9 PM78 PM56 0 IS2 IS8 PM34 IS1 IS7 PM23 000h AAAh 0AAh PM12 000h 1) Default Values after Reset 2) if a read command is send, the command is ignored and S_SO returns a frame with '0'. Data Sheet 51 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device IS1[1:0]: AND IN/Serial-Mod0 = 11 IN-Mode = 10 Serial-Mode OUT1=1 = 01 Serial-Mode OUT1=0 = 00 IS1[1:0] DC18[0]: Diagn. current off = 0 Diagn. Current on = 1 OUT1 11 IN1 OUT1 IS2[1:0] OUT2 10 0x 11 IN2 OUT2 10 0x PM12=1 PM12=0 OUT3 IN3 PM23=1 PM23=0 CH5 IN4 PM56=1 PM56=0 OUT6 OUT7 OUT8 PM78=1 PM78=0 IS10[1:0] CH9 OUT10 11 IN10 OUT 10 10 0x PM910=1 PM910=0 Logic_Output_Control_CORE10.vsd Figure 29 Logic Output Control Block Diagram TLE8110EE Data Sheet 52 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device 12.3.1 CMD - Commands By using the Address Range CMD[14:12]='000' commands can be send to the device. The Feedback of the commands is provided in the next SPI SO Frame.Details about the Feedback on each command is described in the Chapter 12.3.1.1ff. It is possible to perform per each Communication Frame ONE Command out of Group-A (see following description of the Commands) and ONE Command out of Group-B at the same time. Performing more then one Command of one Group is not possible. For the case, this happens, the commands are ignored. CMD Command Register Overview Commands S_SI SPI_Serial Input CMD 11 RSD RSDS RPC RINx CSDS NOP 0 0 0 0 0 0 Reset Value: N.A. 10 1 1 1 1 1 1 9 1 1 1 1 1 1 8 1 1 1 1 1 1 7 0 0 0 0 0 0 6 0 0 0 0 0 0 5 0 0 0 0 0 0 4 0 0 0 0 1 0 3 0 0 0 1 0 0 2 0 0 1 0 0 0 1 0 1 0 0 0 0 0 1 0 0 0 0 0 Field Command Type Description Command Bits Group-B (Bits [7:4]) All other bit combinations are not valid. Command will be ignored then. NOP 0000 W W NOP - no operation. A frame with '0000h' will be returned CMD_CSDS - Command: Clear Short Diagnosis and Device Status Clear the Device Status information. Performing this Clear Command clears the Information in the Reset and Communication Error Information as long as the incident is not present anymore. If the incident is still present, the related Bits remain setted. Performing this command does NOT clear the Diagnosis Registers. The Diagnosis Information is cleared by the Clear Diagnosis Commands. (see Chapter 12.3.2) SO returns a Frame with '0000h' after performing CMD_CSDS or in case this command is carried out together with a command out of Group-A, the feedback is according the Group-A command CMD_CSDS 0001 Command Bits Group-A (Bits [3:0]) All other bit combinations are not valid. Command will be ignored then. Data Sheet 53 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device Field CMD_NOP Command 0000 Type W Description NOP - no operation. A frame with '0000h' will be returned CMD_RINx - Command: Return Input Pin INx -Status (Chapter 12.3.1.4) CMD_RPC - Command: Return Pattern Check (Chapter 12.3.1.3) CMD_RSDS - Command: Return Short Diagnosis and Device Status (Chapter 12.3.1.2) CMD_RSD - Command: Return Short Diagnosis (Chapter 12.3.1.1) CMD_RINx CMD_RPC 1000 0100 W W W CMD_RSDS 0010 CMD_RSD 0001 W 12.3.1.1 CMD_RSD - Command: Return Short Diagnosis The Command CMD_RSD offers the possibility to read out the OR-operated "short"-Diagnosis within one SO Feedback Frame. The data to be send is latched at the end of the command frame . CMD_RSD W CMD_RSD R/W xxxx R/W xxxx TOR dept. of previous R/W TOR SD TOR xxxx SPI_Protocol_CMD_RSD.vsd Figure 30 SPI Feedback on CMD_RSD S_SO SPI_Serial Output CS TOR 15 PAR 14 0 13 0 12 0 11 0 10 0 9 SD10 8 SD9 7 SD8 6 SD7 5 SD6 4 SD5 3 SD4 2 SD3 1 SD2 0 SD1 Data Sheet 54 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device Field - Bits - Type - Description SD1-10 Short Diagnosis 0 Normal Operation 1 Each SD-Bit contains the NAND-operated Diagnosis Error of each related Channel. Details can be read in diagnosis registers SD is returned after each Write Cycle to any of the writable registers. 12.3.1.2 CMD_RSDS - Command: Return Short Diagnosis and Device Status The Command CMD_RSD offers the possibility to read out the OR-operated "short"-Diagnosis and the device Status - such as Reset-Information and Communication Error - within one SO Feedback Frame. The data to be send is latched at the end of the command frame . CMD_RSDS S_CS S_SI W S_SO TOR CMD_RSDS R/W xxxx R/W xxxx dept. of previous R/W TOR SDS TOR xxxx SPI_Protocol_CMD_RSDS.vsd Figure 31 SPI Feedback on CMD_RSDS Data Sheet 55 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device S_SO SPI_Serial Output CS TOR 15 PAR 14 0 13 0 12 0 11 0 10 0 9 0 8 0 7 6 5 4 3 2 1 0 SDS8 SDS7 SDS6 SDS5 SDS4 SDS3 SDS2 SDS1 Field - Bits 7:0 0 Type - Description SDS - Short Diagnosis and Device Status SDS1 - Diagnosis Error in Channel 1 to 6 0 1 1 - normal operation diagnosis failure normal operation diagnosis failure SDS2 - Diagnosis Error in Channel 7 to 10 0 1 2 3 4 - SDS3 - Under Voltage on VCC (Digital Supply Voltage) see Figure 32 SDS4 - Under Voltage on VDD (Analogue Supply Voltage) see Figure 32 SDS5 - Modulo Counter Error 0 1 5 - normal operation Previous Modulo Counter Error normal operation Previous Communication Error - Encoded Command Ignored SDS6 - Previous Communication Error - Encoded Command Ignored 0 1 6 7 - SDS7 - not used = '0' always '0' SDS8 - not used = '0' always '0' Data Sheet 56 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device Behaviour of SDS 3 and SDS 4 in relation to RST , EN, VDD, VCC and CMD .CSDS SDS3 VCC or... RST SDS4 EN=1 SDS3 0 VCC or... RST 1 CMD.CSDS 0 SDS4 0 VDD 1 CMD.CSDS 0 SDS4 0 SDS4 EN=0 VCC or... RST 1 1 CMD.CSDS 0 SDS4 0 VDD 0 CMD.CSDS 0 SDS4 0 SDS4 EN=0 1 EN 0 0 CMD.CSDS 0 SDS4 0 1* CMD.CSDS 0 * During EN = 0, the device internal VDD supply is disabled in order to fulfill low quiescent current requirements. After the transition from EN=0 to 1, the SDS4 will detect under voltage (it is set SDS4=1) until the clear command CMD.CSDS it sent (SDS4=0). SDS3_4_behaviour.vsd Figure 32 Data Sheet Behaviour of SDS3, 4 57 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device 12.3.1.3 CMD_RPC - Command: Return Pattern Check The Command CMD_RPC offers the possibility to get returned the previous Command to check if the communication works well. The data to be send is latched at the end of the command frame . CMD_RPC W CMD_RPC R/W xxxx R/W xxxx TOR dept. of previous R/W TOR CMD_RPC TOR xxxx SPI_Protocol_CMD_RPC.vsd Figure 33 SPI Feedback on CMD_RPC S_SO SPI_Serial Output CS TOR 15 PAR= 0 14 0 13 0 12 0 11 0 10 1 9 1 8 1 7 0 6 0 5 0 4 0 3 0 2 1 1 0 0 0 Field - Bits - Type - Description CMD_RPC is returned 12.3.1.4 CMD_RINx - Command: Return Input Pin (INx) -Status The Command CMD_RINx offers the possibility to read out the actual status of the Input Pins. This command allows to check the correct communication on the INx Pins. The data to be send is latched at the end of the command frame . Data Sheet 58 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device CMD_RINx W CMD_RINx R/W xxxx R/W xxxx TOR dept. of previous R/W TOR INx TOR xxxx SPI_Protocol_CMD_RINx.vsd Figure 34 SPI Feedback on CMD_RINx S_SO SPI_Serial Output CS TOR 15 PAR 14 0 13 0 12 0 11 0 10 0 9 IN10 8 IN9 7 IN8 6 IN7 5 IN6 4 IN5 3 IN4 2 IN3 1 IN2 0 IN1 Field - Bits - Type - Description INx Input Pin Status The Status of the INx Pins is read out at the moment of CS High-to-Low transition. Details see Figure 35. 0 INx = Low corresponding OFF 1 INx = High corresponding ON Data Sheet 59 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device OUT1 IN1 Control Logic OUT2 IN2 OUTn INx Temporal INx Register latched by CMD_PINx and CS High-to-Low transition Latch on CS Transfer on CS to SPI-SO-Register CS SI SO CMD_RINx RINx INx_readout.vsd Figure 35 Read-out of INx Pins 12.3.2 DCC - Diagnosis Registers and compactCONTROL The DCC - Diagnosis and Compact Control Set allows to read out and clear the Diagnosis Registers. Additionally this Command set offers the possibility to proceed with a compactCONTROL Mode using DMS - Diagnosis Mode Set and OPS - Output Pin Set Commands. This compactCONTROL Mode offers the possibility to Control the device with lowest work load on the micro controller side. If any other pattern then the defined commands is received on S_SI, the command is ignored and rated as a Communication Error. In this case, this incident is reported in SDS (Chapter 12.3.1.2) and TOR (Chapter 12.2.4.3). If an Error in the Output Channels is detected by the diagnosis circuit, the result is latched in the diagnosis registers related to each channel. The Diagnosis Register is not deleted, when it is just read out. The Diagnosis Register byte can only be cleared by using the appropriated command. In this case, the complete Register Bank is cleared. The separation in two diagnosis register banks allows together with the Device Control Bits "Latch on Over Current or Over Temperature" [LOTC] a separated handling of the channel groups. The groups of Channel 1 to 6 and 7 to 10 can be treated separately in this case. For details, see also chapter Chapter 12.3.6. DCC Diagnosis Registers and Compact Control Reset Value: N.A. Data Sheet 60 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device S_SI SPI_Serial Input DCC 11 DRA DRB DRACL DRBCL DMSCL/OPSx DMS1/OPSx DMS2/OPSx DMS3/OPSx DMSx/OPS1 DMSx/OPS2 DMSx/OPS3 DMSx/OPS4 DMSx/OPS5 DMSx/OPS6 DMSx/OPS7 DMSx/OPS8 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 10 1 1 0 0 0 0 1 1 9 0 1 0 1 0 1 0 1 DMSx DMSx DMSx DMSx DMSx DMSx DMSx DMSx 8 1 0 1 0 0 1 1 0 7 0 0 0 0 6 0 0 0 0 5 0 0 0 0 4 0 0 0 0 OPSx OPSx OPSx OPSx 3 0 0 0 0 2 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 Field DCC_DRA Bits 11:0 Type W Description DRA - Diagnosis Register A (see Chapter 12.3.2.1) Read out Diagnosis Register A. Return the contents in the next SPI Frame. (see Chapter 12.3.2.2) DRB - Diagnosis Register B (see Chapter 12.3.2.1) Read out Diagnosis Register B. Return the contents in the next SPI Frame. (see Chapter 12.3.2.2) DRACL - Diagnosis Register A Clear Clear the contents of the Diagnosis Register A. Return the cleared contents in the next SPI Frame. If the Diagnosis Error Remains, the Information remains.(see Chapter 12.3.2.2) DRBCL - Diagnosis Register B Clear Clear the contents of the Diagnosis Register B. Return the cleared contents in the next SPI Frame. If the Diagnosis Error Remains, the Information remains. (see Chapter 12.3.2.2) DMSCL/OPSx - Diagnosis Mode Set, Clear / Output Pins Set On sending this command, the diagnosis registers DRA, DRB as well as the "virtual" Diagnosis Output Registers DO[7:0] (see Chapter 12.3.2.3) are cleared. Output Pin Settings are done according the content of OPSx. Returns the contents of cleared DR2 on SO in the 2nd byte of the actual communication frame and the Output Pin Feedback in the 1st Byte of the next frame. (see Chapter 12.3.2.3) 11:0 DCC_DRB 11:0 DCC_ DRACL DCC_ DRBCL 11:0 W W W DCC_ DMSCL 11:8 W Data Sheet 61 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device Field DCC_ DMS1 Bits 11:8 Type W Description DMS1/OPSx - Diagnosis Mode Set, Register1 / Output Pins Set On sending this command, the diagnosis registers DR1 is selected. Output Pin Settings are done according the content of OPSx. Returns the contents of DR1 on SO in the 2nd byte of the actual communication frame and the Output Pin Feedback in the 1st Byte of the next frame. (see Chapter 12.3.2.3) DMS2/OPSx - Diagnosis Mode Set, Register2 / Output Pins Set On sending this command, the diagnosis registers DR2 is selected. Output Pin Settings are done according the content of OPSx. Returns the contents of DR2 on SO in the 2nd byte of the actual communication frame and the Output Pin Feedback in the 1st Byte of the next frame. (see Chapter 12.3.2.3) DMS3/OPSx - Diagnosis Mode Set, Register3 / Output Pins Set On sending this command, the diagnosis registers DR3 is selected. Output Pin Settings are done according the content of OPSx. Returns the contents of DR3 on SO in the 2nd byte of the actual communication frame and the Output Pin Feedback in the 1st Byte of the next frame. (see Chapter 12.3.2.3) DMSx/OPS1 - Diagnosis Mode Set x/ Output Pin Set Command 1 On sending this command, the diagnosis register is selected according DMSx. The Output Pins of Channel 7-10 are set according the following definitions. The OPSx are commands, no register. The commands are controlling the contents of ISA, ISB and OUTx. OPS[7:0] - Output Pin Set 0000 0001: CH7 input select, 1: parallel* / 0 : Serial 0000 0010: CH8 input select, 1: parallel* / 0 : Serial 0000 0100: CH9 input select, 1: parallel* / 0 : Serial 0000 1000: CH10 input select, 1: parallel* / 0 : Serial 0001 0000: CH7 output set, 1: ON / 0:OFF 0010 0000: CH8 output set, 1: ON / 0:OFF 0100 0000: CH9 output set, 1: ON / 0:OFF 1000 0000: CH10 output set, 1: ON / 0:OFF (*parallel controlled by INx) Sending OR operated combinations of above listed options (only OPSx) are possible in order to control more then one channel at the same time. If parallel mode Mode is selected (in "input select"), the serial settings (in "output select") are ignored. In parallel Mode, the selected Channels are controlled via INx Pins. The default setting of ISB corresponds the command OPS[7:0] = xxxx 1111b. (parallel mode, status of the Outputs according signal on INx) Returns the contents the selected DRx register on SO in the 2nd byte of the actual communication frame and the Output Pin Feedback [OPF] in the 1st Byte of the next frame. (see Chapter 12.3.2.3) DCC_ DMS2 11:8 W DCC_ DMS3 11:8 W DCC_ 7:0 DMSx/OPSx W Data Sheet 62 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device 12.3.2.1 DRx - Diagnosis Registers Contents Reset Value: 0000 0000 0000B = 000h DRA[1:0]x / DRB[1:0]x Diagnosis Register CHx Bank A and Bank B 11 DRA[1]6 10 DRA[0]6 9 DRA[1]5 8 DRA[0]5 7 DRA[1]4 6 DRA[0]4 5 DRA[1]3 4 DRA[0]3 3 DRA[1]2 2 DRA[0]2 1 DRA[1]1 0 DRA[0]1 11 0 10 0 9 0 8 0 7 6 5 4 DRB[0]9 3 DRB[1]8 2 DRB[0]8 1 DRB[1]7 0 DRB[0]7 DRB[1]10 DRB[0]10 DRB[1]9 Field DRA[1:0]x / DRB[1:0]x Bits 1:0 Type R Description DRA[1:0]x / DRB[1:0]x DRn[1]x/DRn[0]x = 11 no Error DRn[1]x/DRn[0]x = 10 Over Load, Shorted Load, Over temperature in ON-Mode DRn[1]x/DRn[0]x = 01 Open Load in OFF-Mode DRn[1]x/DRn[0]x = 00 Short to GND in OFF-Mode default DRx[1:0] = 11B A new error on the same channel will overwrite older information. The diagnosis information which is returned by SO is latched when CS makes a High-to-Low transistion of the frame which sends out the register. 12.3.2.2 DRx - Return on DRx Commands x_DRx W x_DRx R/W xxxx R/W xxxx TOR dept. of previous R/W TOR DRx TOR xxxx SPI_Protocol_x_DRx.vsd Figure 36 SPI Feedback on x_DRx commands Data Sheet 63 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device S_SO SPI_Serial Output CS TOR 15 PAR 14 0 13 0 12 1 11 DRx [1]x 10 DRx [0]x 9 DRx [1]x 8 DRx [0]x 7 DRx [1]x 6 DRx [0]x 5 DRx [1]x 4 DRx [0]x 3 DRx [1]x 2 DRx [0]x 1 DRx [1]x 0 DRx [0]x Field - Bits - Type - Description DRx Contents 0 no Diagnosis Error 1 Diagnosis Error 12.3.2.3 Protocol DMSx/OPSx - Diagnosis Mode Set / Output Pin Set Commands Each Cycle where a serial data or command frame is sent to the Serial Input [SI] of the SPI interface, a data frame is returned immediately by the Serial Output [SO]. The content of the SO frame is dependent of the previous command which has been sent to SI and the content of the actual content of SI: The first Byte send by S_SI controls the content of the second byte actual returned by S_SO. The second Byte send by S_SI controls the first byte in S_SO of the next frame. (see Figure 37) DMSx OPSx Upper Byte Lower Byte Lower Byte Upper Byte Upper Byte Lower Byte Lower Byte TOR Upper Byte DO TOR OPF TOR SPI_Protocol_Short_Mode.vsd Figure 37 Data Transfer in Diagnosis and Compact Control S_SI SPI_Serial Input 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Diagnosis Mode Set DMS[4:0] 0 0 0 1 - - - - Output Pin Set OPS[7:0] serial mode selected parallel or serial mode CH10: CH9: CH8: CH7: CH10: CH9: CH8: CH7: 0= 0= 0= 1:ON 1:ON 1:ON 1:ON 0 = 0:OFF 0:OFF 0:OFF 0:OFF serial serial serial serial 1= 1= 1= 1= par. par. par. par. Data Sheet 64 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device S_SO SPI_Serial Output 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Output Pin Set Feedback OPF[7:0] Diagnosis Output DO[7:0] Diagnosis Register Diagnosis Output Registers DO[7:0] 7 6 Diag Register-1 Diag Register-2 Diag Register-3 DR4[1] DR1NA DR10[1] DR4[0] DR3NA DR10[0] 5 DR3[1] 1 DR9[1] 4 DR3[0] 1 DR9[0] 3 DR2[1] DR6[1] DR8[1] 2 DR2[0] DR6[0] DR8[0] 1 DR1[1] DR5[1] DR7[1] 0 DR1[0] DR5[0] DR7[0] Field DO[7:0] Bits 7:0 Type R Description DO[7:0] - Diagnosis Output Contents according settings of DMS[4:0] Returned within the same frame as the pointer is send. DRx[1:0] definitions: see Chapter 12.3.2.1 DO[7:6] Diag Register-2 7:6 R DO1NA: NAND-operated diagnosis of Diag Register-1 DO3NA: NAND-operated diagnosis of Diag Register-3 1: at least one diagnosis error is stored in the related Diag Register 0: no diagnosis error is stored in the related Diag Register. Output Pin Feedback Output Pin Feedback OPF[7:0] 15 14 OPF[7] OPF[6] 13 12 OPF[4] 11 OPF[3] 10 OPF[2] 9 OPF[1] 8 OPF[0] OPF[5] Field OPF[7:0] Bits 15:8 Type R Description OPF[7:0] - Output Pin Feedback Principally, OPF can return the previously send OPS word and the IN 10:7 -pin settings, dependent serial/parallel-setting of OPS: - If Serial Mode is selected by one or more OPS[3:0]-bits, the related OPF[7:4]-bits are returning the settings of OPS[7:4], send at the previous frame. - if parallel Mode is selected by one or more OPS[3:0]-bits, the related OPF[7:4]-bits are returning the condition available at the related IN 1:7 Pins at the moment of S_CS high-to-low transition. A mix of both modes is possible and depends on the channel related settings. 65 Rev. 1.0, 2009-06-15 Data Sheet FLEX Smart Multi-Channel Switch Control of the device 12.3.3 OUTx - Output Control Register CHx The Output Control Register OUTx consists of 10 Bits to control the Output Channel. Each Bit switches ON/OFF the related Channel. OUTx becomes only active when ISx[1:0] = 0x. For details refer to Chapter 12.3.4. OUTx Output Control Register DATA Reset Value: 1100 0000 0000B = C00h 11 1 10 1 9 OUT10 8 OUT9 7 OUT8 6 OUT7 5 OUT6 4 OUT5 3 OUT4 2 OUT3] 1 OUT2 0 OUT1 Field OUTx[9:0] Bits 9:0 Type R/W Description Data - OUTx[9:0] OUTx = 0 According Channel is switched OFF OUTx = 1 According Channel is switched ON default (all channels OFF) OUT[9:0] = 00 0000 0000B = 000h Data - OUTx[11:10] bits are set to OUT[11:10] = 1. OUT[11:10] 11:10 R/W 12.3.4 ISx - INPUT or Serial Mode Control Register, Bank A and Bank B The INPUT or Serial Control Register [ ISx[1:0] ] allows to define the way of controlling the Output Channels. There are 4 setting options possible: * * * * Standard Serial Control: The related Output Channel is set according the content of the OUTx Register. (Chapter 12.3.3) A further possibility is the control by the Input Pins The settings of the Parallel Mode Register PMx[0]. (Chapter 12.3.5) Additionally possible is the AND operation between the setting of the OUTx register and the PWM signal at the INPUT Pin. ISAx INPUT or Serial Mode Control Register Bank A 11 10 9 8 7 IS6 IS5 IS4 COMMAND Reset Value: 1010 1010 1010B = AAAh 6 5 IS3 4 3 IS2 2 1 IS1 0 Data Sheet 66 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device ISBx INPUT or Serial Mode Control Register Bank B 11 0 COMMAND Reset Value: 0000 1010 1010B = 0AAh 6 5 IS9 10 0 9 0 8 0 7 IS10 4 3 IS8 2 1 IS7 0 Field ISx[1:0] Bits 11:0 ISAx 7:0 ISBx Type R/W Description Command - IS[1:0] ISx[1:0]= 0x: Serial Mode - The Channel is set ON/OFF by OUTx. 10: INPUT Mode - CHx ON/OFF according INx 11: AND operate Mode INx with OUTx -> CHx ON if OUTx & INx =1 default all Channels ISx[1:0] = 10B 12.3.5 PMx - Parallel Mode Register CHx The Parallel Mode Register PMx[1] allows to "inform" the device about externally parallel connected output channels. If a PMx bit is set, the "lower" related Input Channel controls the indicated Output Channels to achieve best possible matching and according to that highest efficiency of both channels. Additionally to that, the CLAMPsafe feature allows high matching during clamping. PMx Parallel Mode Register CHx 11 10 9 0 0 0 8 0 7 PM910 6 PM89 5 PM78 COMMAND Reset Value: 0000 0000 0000B = 000h 4 3 2 1 0 PM56 0 PM34 PM23 PM12 Field PMx PMx Bits 11:8 7:0 Type R/W R/W Description 0 PMx - Parallel Mode Bit 0 Direct Mode 1 Parallel Mode of Channel 1 with x+1 default PMx[0] = 0 Controlling Parallel Mode is possible between Channel 1 to 4, 5 to 6, 7 to 10. In between the groups, no parallel mode is supported but possible. In case Parallel Mode is chosen and a diagnosis error at only one of the channels is detected, the according diagnosis bit is set. This information mismatch can be caused by tolerance related inbalance of the channels connected together in parallel mode. The diagnosis bits should be or-operated by the Micro Controller side. 12.3.6 DEVS - Device Settings This Register allows additional Device settings. For details refer also to the Chapter "Electrical Characteristics". The Diagnosis Current Control register allow to select between different Diagnosis Modes. The Diagnosis Currents can be switched off to avoid glowing of any connected LEDs. Data Sheet 67 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device The Register Latch on Over Current or Over Temperature LOTC[1:0] defines the reaction of the protection functions on exceeding the operating ranges. DEVS Device Settings COMMAND Reset Value: 0000 0000 0111B = 007h 11 RCP 10 DBT2 9 DBT1 8 LOTC70 [1] 7 LOTC70 [0] 6 LOTC16 [1] 5 LOTC16 [0] 4 0 3 0 2 DCC10 1 DCC9 0 DCC18 Field RCP Bits 11 Type R/W Description RCP - Reverse Current Protection 1: reverse current comp is enabled (valid for all Channels) 0: disabled default: RCP = 0 DBT2 DBT1 10 9 R/W DBT2,1 - Diagnosis Blind Time Channel 7 to 10 0,0 standard Filter Time of typ. 150s 1,0 standard Filter Time of typ. 150s 0,1 OFF-state diagnosis Blind Time of typ. 2.5ms 1,1 OFF-state diagnosis Blind Time of typ. 5ms LOTCx[1:0] - Latch on Over Temperature or Over Current LOTC16[1:0] - Settings for Ch 1 to 6 LOTC70[1:0] - Settings for Ch 7 to 10 00 Default: shut down and latch when over current or over temperature was detected. The related channel can only be turned on again, when the Diagnosis Byte is deleted by a clear command. Changing to other modes might cause severe damage to the device over longer operating periods. 01 shut down and restart with next turn-on command /or DATA of the channel. No clearance of the Diagnosis Register required. 10 shut down and restart automatically after delay time 11 not used, is a command with =11 is received, frame is ignored. default LOTCxx[1:0] = 00. not used. set to '0' LOTC16[1:0] 6:5 LOTC70[1:0] 8:7 R/W DEVS[4:3] 4:3 R/W Data Sheet 68 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Control of the device Field DCCx Bits 2:0 Type R/W Description DCCx - Diagnosis Current Control DCC18 switching ON/OFF diagnosis current of CH1-8 DCC9 switching ON/OFF diagnosis current of CH9 DCC10 switching ON/OFF diagnosis current of CH10 0 OFF-State Diagnosis (Detection of open load and short to GND) of CHx is switched OFF. ON state diagnosis (over current and over temperature detection) is still active. Diagnosis Current is switched OFF. 1 OFF-State (Detection of open load and short to GND) and ONState (over current and over temperature detection) Diagnosis of CHx switched ON, Diagnosis Current is switched ON default DCC = 1 Data Sheet 69 Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Package Outlines 13 Package Outlines P_DSO_36_24_outline .vsd Figure 38 PG-DSO-36-41 Exposed Pad Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). You can find all of our packages, sorts of packing and others in our Infineon Internet Page "Products": http://www.infineon.com/products. Data Sheet 70 Dimensions in mm Rev. 1.0, 2009-06-15 FLEX Smart Multi-Channel Switch Revision History (Book) 14 TLE8110EE Revision History (Book) Revision History: Ver 1.0 2009-06-15 2009-06-15: datasheet released Rev. 1.0 Data Sheet 71 Rev. 1.0, 2009-06-15 Edition 2009-06-15 Published by Infineon Technologies AG 81726 Munich, Germany (c) 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. |
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